Micro-system and interconnect process development test vehicle electrical, mechanical, and thermal validation.Help develop manufacturing and test workflows, 2.5D/3D modeling methods, BKMs (Best Known Practices) to comprehend and optimize Power/Thermal/Mechanical/Signal Integrity/RF impacts of multi-chiplet and multi-domain heterogeneous micro-systems.Contribute to the design and development of 2.5D and 3D advanced packaging solutions for semiconductor devices.Develop and support TIE's 3D-ADK (Assembly Design Kit).Interpret fab metrology, defect, E-test, and yield process data, silicon-to-simulation analysis versus variability targets, layout effects, design rule assessments, and product parametric correlation to electrical monitor structures to find innovative product/process solutions and optimize product yield, performance, and reliability.Collaborate with internal and external design teams to ensure package compatibility with semiconductor die and system-level requirements.Design and execute experiments to evaluate and optimize packaging performance, reliability, and manufacturability/yield.Stay current with industry trends and emerging technologies in semiconductor packaging and design integration to drive innovation and continuous improvement.